Kevin Martin

Maître de conférences / Associate Professor

IUT Lorient - Université de Bretagne-Sud
Lab-STICC
Centre de Recherche Christiaan Huygens
BP 92116
56321 Lorient Cedex - FRANCE
Phone : +33 (0)2.97.87.46.36 (research center)
28.54 (IUT)
kevin (dot) martin (at) univ-ubs (dot) fr

Voir mon profil
Research Gate

Short Biography

Kevin Martin is an associate professor at Université Bretagne-Sud, France, in the Lab-STICC.
He has received a M.S. in electrical and computer engineering in 2004 and a PhD in computer science in 2010 from the Université de Rennes, France.
His research interests include system-level design and methodologies, custom processors, embedded multi-processor platforms, high-level synthesis, computer-aided design for SoCs and embedded systems.

Positions

Post-doc, October 2017, duration 1 year (6 month in Singapore, 6 month in Lorient)

"Design and prototype of a coarse-grained reconfigurable and secured crypto-processor" more details

CGRA, cybersecurity, asymmetric cryptography, physical attacks, side chanel, reconfigurable architectures

PhD, September 2017, duration 3 years

"Integrated Programmable-Array accelerator to design heterogeneous ultra-low power manycore architectures" more details

CGRA, Manycore, Energy,

Proposition de thèse : "Accélérateurs programmables intégrés et dynamiquement reconfigurables pour la conception d'architectures manycores hétérogènes adaptatives" proposition en pdf

CGRA, Manycore, Energie,

Master internship, March 2017, duration 6 months (ongoing)

Master 2 internship : "Porting a Runtime Manager for Reconfigurable Dataflow Graph on a Manycore Architecture" more details

Manycore , Embedded , Parallelism , Dataflow , Runtime , MPPA

Stage Master 2 : "Portage de gestionnaire d'exécution pour graphe flux-de-donnée reconfigurable sur architecture massivement parallèle Kalray MPPA" proposition en pdf

Multicoeur , Embarqué , Parallélisme , Dataflow (flux-de-données), Runtime (gestionnaire d'exécution), MPPA

Events

Member of the organizing committee of SiPS 2017: http://sips2017.org
Member of the organizing committee of Compas 2016: http://2016.compas-conference.fr
Demo Night Co-Chair of DASIP 2016: http://ecsi.org/dasip

Research

Custom processors, embedded multiprocessor platforms, compilers, high-level synthesis, CGRA.

Projects

MORDRED (2016-2017)
HPeC (2015-2019)
COMPA (2011-2015)

Publications

click here

Current PhD students

Satyajit Das, Architecture and programming model support for reconfigurable accelerators in shared-memory many-cores, 2014-2017
Thomas Brouchet, Memory access optimization in a fault-tolerant CGRA, 2015-2018
Rodrigo Cadore Cataldo, Smart Network-on-Chip interfaces and notifying memories for manycore architectures, 2016-2019

PhD graduates

Paola Vallejo, Reuse of legacy code for DSML Tools in the context of MPSoC, 2012-2015

now Assistant Professor (Colombia)

Thanh Dinh Ngo, Scheduling and mapping of CAL actors onto heterogeneous multiprocessor platforms, 2012-2015

now Lecturer at Danang University

Thomas Peyret, CGRA and Fault-tolerant systems, 2011-2014

now engineer at CEA Saclay

M.Sc graduates

Christina Merhej, 2015
Baptiste Goupille-Lescar, 2015
Ramesh Sureshbabu, 2014
Hajar El Rhomri, 2014
Bao Cheng Cong, 2013

Teaching

I.U.T (Technological Institute of the University) of Lorient.

Analogue and digital electronic
ADC/DAC
Sensors
Microprocessors, micro-controllers
C language

Master Research

Algorithms for VLSI

ENSIBS

Micro-systems

Miscellaneous

Sport, Music (guitar)