Workshop scope
This workshop on High-Level Synthesis for High-Performance Computing is an interdisciplinary forum for researchers, practitioners, developers and application writers to discuss ideas, experience, methodology, applications, practical techniques and tools to improve or change current and future HPC systems by using HLS.This workshop intends to bring together researchers and engineers in the confluence of high-performance, High-Level Synthesis and Compilation. HLS providers will give an outline of methods and tools available currently on the market and bring the details on their applicability, performance, and strengths. They will also express their needs in term of high level optimization or compilation techniques to improve synthesis results. People from compilation domain will present last results in high level optimisation like loop transformations or application parallelisation. Finally, HLS users from the HPC community will express their needs. All will also present experimental results and run demonstrations during interactive/poster sessions. This event will thus create a discussion platform for experience exchange between providers of synthesis technology and users. The goal is here to make people from different communities i.e. compilation, HPC, HLS and HW design to meet and exchange about HLS for HPC.
The goal is to allow for fruitful discussions on the challenges and research directions that should be tackled by the community. Papers are invited to illustrate current and future work in the theory and practice of the design and engineering of high-performance systems (including real-time and embedded systems) for a variety of application domains.
Topics of interest to this edition of the workshop include but are not limited to:
High level Synthesis
Compiler optimizations and techniques
High Performance Computing