Near optimal bit correlator for synchronisation

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Abstract

Binary correlator is a common tool in digital signal processing system to perform synchronisation in a binary stream. The principle is to detect a known fixed pattern in a binary stream that can be corrupted by noise with a probability of error p. If the match between the N last received bits and the N bits of the training sequence is above a given treshold, a new frame is then detected.

We developped a suboptimal algorithm to synplify the bit correlator hardware implementation onto a FPGA. Performances of the proposed suboptimal algorithm are entirely caracterized with a MATLAB program.

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Collaboration

This work is the result of research project carried out with the financial support of the "Région Bretagne" (PRIR n°06003125 RITMO).

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Related paper/conference

  1. C. Cunat, E. Boutillon, " Simplified hardware bit correlator", IEEE Communication Letters, vol. 11, n°6, june 2007.
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Sources files

The MATLAB source file can be directly downloaded:

  1. Calculation of probability density function
  2. Near Optimal Binary Correlator

The VHDL source files are free under a GPL licence, please, send an email at emmanuel.boutillon@univ-ubs.fr with the subjet "request for Near Optimal Bit Correlator source files" and you will receive the source files by email.

All you comments and improvements on this WEB site and the source files are welcomed.

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