Key words: turbo codes, interleavers, multiple turbo codes, tail-biting codes, slice turbo codes, high speed
Abstract: This paper proposes a new approach to design high speed turbo codes for very low frame error rate applications. The proposed coding scheme is based on a three-dimensional Multiple Slice Turbo Code (3D-MSTC). The optimization of the two deterministic interleavers is described. By an asymmetric puncturing pattern, we show that convergence can be trade-off against minimum distance (i.e. error floor) in order to adapt the performances of the 3D-MSTC to the requirement of the application. The performance and the complexity of the decoders are compared for duo-binary turbo codes for different iterative decoding schemes. For a 4k bit information frame, the 8-state trellis 3D-MSTC proposed achieves a throughput of 100 Mbit/s for an estimated area of 2.9 mm2 in a 0.13 mm technology. The simulation results show that the FER is below 10-6 at a SNR of 1.45 dB. The union bound gives an error floor that appears at a FER below 10-8. The performance of the proposed 3D-MSTC for low FERs outperforms the performance of a 16-state 2D-MSTC with 20% less complexity.
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Authors: David Gnaedig, Emmanuel Boutillon, Michel Jezequel
Reference Accepted to the Special Issue on Turbo Processing of the EURASIP Journal on Applied Signal Processing