Email: Arnaud.Tisserand@univ-ubs.fr ( * )
Seminars on Security of Embedded Electronic Systems (DGA-IRISA)
Computer arithmetic: operations, elementary functions, number systems, secure operators, reliable arithmetic...
Applied cryptography: asymmetric cryptography in hardware or embedded software, (H)ECC operators and crypto-processor, protections/countermeasures against side channel attacks, cybersecurity/cyberdefense, ...
Hardware accelerators: arithmetic operators/accelerators on FPGAs, ASICs, GPUs and embedded multicores
Software libraries: arithmetic support for crypto and embedded systems, finite field arithmetic
VLSI design and CAD tools: ASIC and FPGA circuits, asynchronous circuits, low power consumption, circuit generation tools
Applications: embedded systems, digital security, cyber-security/defense, scientific computing, digital signal processing, image processing, digital control.
2014+: Associate Editor of the IEEE Transactions on Computers
2014-2015: Program Committee co-Chair of the 22nd IEEE Symposium on Computer Arithmetic (ARITH-22)
2015: President of the organisation committee of the french Rencontres Arithmétiques de l'Informatique Mathématique (RAIM 2015)
2013-2014: co-President of the french Conférence d'informatique en Parallélisme, Architecture et Système (ComPAS 2014)
2012-2015: Nominated member of the French National Council of Universities for computer science CNU 27 (co-organisateur de la session de Qualifs MdC 2015)
2012-2015: Elected member of the Scientific Council of University Rennes 1 (and member of the "HDR commission")
2011-2016: Nominated member of the Scientific Council of ENSSAT Engineering School
2014-2017: Reliasic project with IRISA, Lab-STICC, IETR (funded by Labex CominLabs and Brittany Region)
2014-2017: H-A-H (Hardware and Arithmetic for Hyperelliptic Curves Cryptography) project with IRISA, IRMAR (funded by Labex CominLabs, Labex Lebesgue and Brittany Region)
2012-2016: PAVOIS project with IRISA, LIRMM (funded by ANR Programme "Blanc" 2012)
2012-2014: CNRS PICS Project SPiNaCH (Secure and low-Power sensor Networks Circuits for Healthcare embedded applications) with Codes and Cryptography Research Group, University College Cork, Ireland
2011-2016: ARDYT (Reliable and Reconfigurable Dynamic Architecture) project with IRISA, Lab-STICC, LCIM and Atmel (funded by ANR Programme "Ingénerie Numérique et Sécurité" 2011)
Prix du meilleur papier à Compas 2015, "track" architecture, pour Comparaison expérimentale d'architectures de crypto-processeurs pour courbes elliptiques et hyper-elliptiques avec Gabriel Gallin et Nicolas Veyrat-Charvillon
Invited presentation at CEA NanoInnov (July 2017) on Arithmetic Tradeoffs on Performance/Cost/Security for Hardware Asymmetric Cryptography
Invited presentation at Colloque National du GDR SOC2 (June 2017) on Embedding Crypto in SoCs: Threats and Protections
Invited presentation at ECC (September 2015) on Hardware Accelerators for ECC and HECC
Invited seminar at Aric (April 2013) on Arithmetic Level Countermeasures for ECC Cryptoprocessors Against Side Channel Attacks
Invited cryptography seminar at IRMAR (June 2012) on Circuits for True Random Number Generation with On-Line Quality Monitoring
Invited talk at Journée sécurité numérique du GDR SoC-SiP (Nov. 2011) on Hardware Arithmetic Operators for Elliptic Curve Cryptography (ECC)
Seminar at the Electrical & Computer Engineering Departement, University of Massachussets Amherst (Nov. 10): Hardware Evaluation of Functions using Optimized Polynomial Approximations
Invited seminar at the Center for Advanced Security Research Darmstadt (CASED) Germany (Apr. 2010): Secured Arithmetic Operators for Cryptography
Invited seminar at the Computer Science and Telecommunications Departement, École Normale Supérieure de Cachan, antenne de Bretagne (Mar. 2010): Exotic Number Systems for Hardware Arithmetic Operators
CAIRN seminar, Nov. 2009: Introduction to Elliptic Curve Cryptography (ECC) Hardware Implementation
Invited seminar at the Electrical & Computer Engineering Departement, University of Massachussets Amherst (Nov. 09): Secured Arithmetic Operators for Cryptography
Symposia on Computer Arithmetic ARITH (main link), editions:
Seminars on Seminar on Security of Embedded Electronic Systems (DGA-IRISA)
Links to colleagues and groups
SAGE: a free open-source mathematics software system (book in french)
GDR du CNRS : IM - Arith - C2 / SoC-SiP / ISIS / Sécurité
ACM: digital library, conferences, publications, special interest groups [ SIGACT, SIGARCH, SIGBED, SIGDA, SIGMICRO, SIGSAC ]
IEEE: digital library, societies : [ CAS, CS, ITS, SSCS ]
Création du Groupe Thématique SMAI-MAIRCI
Société informatique de France (SIF)
Bulletin de la société informatique de France
Agence pour les mathématiques en interaction avec l'entreprise et la société (AMIES)
Workshops CryptArchi
Edition: International Journal of High Performance Systems Architecture
Interstices (site de culture scientifique autour de l'informatique)
Franck Bucheron, (6th year/6, part time 50%), DGA IRISA, co-advisors: B. Martin and L. Rilling
Gabriel Gallin, (3rd year/3), CNRS IRISA Lab-STICC (HAH project)
Audrey Lucas, (1st year/3), CNRS IRISA Lab-STICC (DGA-PEC grant)
Vincent Migliore, (3rd year/3), DGA LabSTICC, main-advisor: G. Gogniat, co-advisor: C. Fontaine
Geneviève Ndour, (1st year/3), CEA LETI, co-advisor: A. Molnos
Links on softwares: AFUL
Remark: my courses are mainly in French but I can prepare support in English on demand
Co-organisation et cours à l'école thématique ARCHI17 : Architectures des systèmes matériels enfouis et méthodes de conception associées (6-10 mars, 2017, Nancy)
Co-organisation et cours à l'école thématique ARCHI15 : Architectures des systèmes matériels enfouis et méthodes de conception associées (8-12 juin, 2015, Lille) [ slides PDF: Processor Extensions for Security ]
Cours à l'école thématique ECOFAC2014 : Conception faible consommation pour les systèmes embarqués temps réel (19-23 mai 2014, Lorient)
Co-organisation et cours à l'école thématique ARCHI13 : Architectures des systèmes matériels enfouis et méthodes de conception associées (25-29 mars, 2013, Col-de-Porte) [ slides PDF: Introduction to FPGA Circuits ]
Co-organisation et cours à l'école thématique ECOFAC2012 : Conception faible consommation pour les systèmes embarqués temps réel (21-25 mai 2012, La Colle-sur-Loup)
Co-organisation et cours à l'école thématique ARCHI11 : Architectures des systèmes matériels enfouis et méthodes de conception associées (2 - 6 mai, 2011, Mont-Louis)
Co-organisation et cours à l'école thématique ECOFAC2010 : Conception faible consommation pour les systèmes embarqués temps réel (29 mars - 2 avril, 2010, Plestin les Grèves, Côtes d'Armor)
Co-organisation et cours à l'école thématique ARCHI09 : Architectures des systèmes matériels enfouis et méthodes de conception associées (30 mars - 3 avril, 2009, Pleumeur-Bodou)
Co-organisation et cours à l'école thématique ARCHI07 : Architectures des systèmes matériels enfouis et méthodes de conception associées (19-23 mars, 2007, Boussens)
Organisation et cours à l'école thématique ARCHI05 : Architectures des systèmes matériels enfouis et méthodes de conception associées (21-25 mars, 2005, Autrans)
Co-organisation et cours à l'école thématique ARCHI03 : Architectures des systèmes matériels enfouis et méthodes de conception associées (31 mars - 4 avril, 2003, Roscoff)
Arnaud Tisserand, PHD 1997 and HDR 2010, is senior researcher ("directeur de recherche" in french) at CNRS (French National Center for Scientific Research) in computer science in Lab-STICC laboratory and the MOCS research group. His research interests include computer arithmetic, computer architecture, digital security, VLSI and FPGA design, design automation, low-power design and applications in applied cryptography, scientific computing, digital signal processing. He taught computer arithmetic, computer architecture and VLSI design. He was PC co-chair of ARITH-22 Symposium. He is Associate Editor of the IEEE Transactions on Computers. He is a senior member of the IEEE (SSCS, CAS) and member of the ACM and IACR.