Efficient FPGA Implementation of Gaussian Noise Generator for Communication Channel Emulation

Key words: VLSI, Channel Emulation, White Gaussian noise generator, Box-Muller, Central limit theorem

Abstract:
In this paper, a high accuracy gaussian noise generator emulator is defined and optimized for hardware implementation on FPGA. The proposed emulator is based on the Box-Muller method implemented using ROMs tabulation and a random memory access. By means of accumulations, the central limit method is applied to the Box-Muller output gaussian distribution. After presenting the algorithmic method this paper analyzes its efficiency for different noise signal formats. Then the archtiecture to fit into FPGA is explained. Finally results from the FPGA synthesis are given to show the value of the method for FPGA implementation. A hardware White Gaussian Noise Generator (WGNG) is developed for mobile communication channel emulation in FPGA circuit. High accuracy, fast and low-cost hardware are reached by combining the Box-Muller and Central limit methods. The performance of the designed model is investigated using MATLAB. The complexity and the performance level are given for some configurations and show the interest of the proposed model.

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Authors: J.L. Danger, A. Ghazel, Emmanuel Boutillon, H. Laamari

Reference: "Efficient FPGA Implementation of Gaussian Noise Generator for Communication Channel Emulation", The 7th IEEE International Conference on Electronicsm Circuits & Systemes (ICECS'2K), Kaslik, Lebanon, Dec 2000.